Nitrogen is now commonly introduced into a gate insulating film in a CMOS type semiconductor device. It is from the following reasons to introduce nitrogen into a gate insulating film in this way.
For example, it is assumed that a gate insulating film of the above-mentioned structure is formed on a semiconductor substrate of a pMOS transistor area, and a gate electrode is formed on the gate insulating film concerned. Here, boron is incorporated into the gate electrode.
In such structure, diffusion of boron from the gate electrode to the semiconductor substrate can be prevented by adopting the above-mentioned gate insulating film in which nitrogen was introduced. Further, the gate leakage current which flows through the gate insulating film can be suppressed by adopting the above-mentioned gate insulating film in which nitrogen was introduced.
Nitrogen is introduced into a gate insulating film of a CMOS transistor from the above reason.
However, when nitrogen concentration in a gate insulating film is made high (especially, when nitrogen concentration in a boundary of a semiconductor substrate and a gate insulating film is made high), the NBTI (Negative Bias Temperature Instability) lifetime in pMOS becomes short as pointed out in the nonpatent literature 1, etc.
In order to suppress lowering of the NBTI lifetime concerned, the technology which introduces fluorine into a gate insulating film of a pMOS transistor exists. As a prior art of the fluorine introduction concerned, Patent Reference 1 exists, for example.
In the technology concerning Patent Reference 1 concerned, a gate insulating film is formed on a semiconductor substrate, and nitrogen is introduced into the gate insulating film concerned. Then, a gate electrode is formed on the gate insulating film concerned. Then, a process of fluorine ion implantation is carried out to a semiconductor substrate on which the gate insulating film and the gate electrode concerned are formed.
Fluorine can be introduced into a gate insulating film by carrying out such steps. When the method concerning Patent Reference 1 is adopted, the concentration of fluorine becomes high mainly at the interface between a gate electrode and a gate insulating film.
[Nonpatent literature 1] N. Kimizuka, et al. Symposium on VLSI Technology Digest of Technical Papers 2000, pp92
[Patent Reference 1] Japanese Unexamined Patent Publication No. 2001-291865